Double-redundant design methodology to improve radiation hardness in pixel detector readout ICs

This paper proposes a new design method to enhance the radiation hardness of circuits for the next generation of pixel detectors in High Energy Physics experiments. The approach is based on Radiation Hardness By Design methodology to mitigate Single Event Effects. In particle detectors, front-end electronics opeates in an environment characterized by a high dose of radiation. We propose a set of digital cells specifically designed to tolerate a high level of radiation (up to 1 Grad). The cells have been designed in 65 nm CMOS technology. Simulation results show the complete functionality up to 1 Grad of total dose of radiation. The first prototype chip has been designed and submitted for fabrication under the Istituto Nazionale di Fisica Nucleare (INFN) CHIPIX65 project.