Effects of package parasitics on substrate and interconnection crosstalk in mixed-signal CMOS ICs
Contributo in Atti di convegno
Data di Pubblicazione:
2006
Citazione:
Effects of package parasitics on substrate and interconnection crosstalk in mixed-signal CMOS ICs / G. Boselli, F. Vincenzo, G. Nicola, V. Liberali, T. Guido, G. Trucco - In: WiRTeP : wireless reconfigurable terminals and platforms : Rome, CNR, 10-12 april 2006 : proceedings / [a cura di] Sergio Benedetto, Rinaldo Castello. - Ospedaletto (Pisa) : Pacini, 2006 Apr. - pp. 98-102 (( Intervento presentato al 1. convegno Wireless Reconfigurable Terminals and Platforms (WiRTeP) tenutosi a Roma nel 2006.
Abstract:
This paper presents an experimental evaluation of crosstalk effects due to current pulses drawn from voltage supplies in mixed analog-digital CMOS integrated circuits. A test chip was designed in 0.18-$\mu$m CMOS technology, integrated and mounted in two different ways, namely, in JLCC package and with flip-chip assembly technique, in order to compare measurement results. As expected, the circuit assembled with the flip-chip technique has better immunity to disturbances generated by the digital section, due to the lower values of interconnection parasitics.
Tipologia IRIS:
03 - Contributo in volume
Elenco autori:
G. Boselli, F. Vincenzo, G. Nicola, V. Liberali, T. Guido, G. Trucco
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Link al Full Text:
Titolo del libro:
WiRTeP : wireless reconfigurable terminals and platforms : Rome, CNR, 10-12 april 2006 : proceedings