Concurrent diagnosis in digital implementations of neural networks

Diagnosis is a basic issue of any fault-tolerance policy. Fault localization within the neural architecture is necessary to provide information for hardware reconfiguration in order to achieve system survival, possibly with reduced computational capabilities. In this paper, a comprehensive approach to architectural fault-tolerant design of neural networks is proposed and evaluated, with specific reference to concurrent high-level diagnosis and fault localization. The approach refers to the operational life of trained neural networks. Two error detection techniques are applied: on-line concurrent diagnosis with the use of data coding for error detection at neuron level and on-line compact testing for localization of the faulty neuron within the network.