Data di Pubblicazione:
2014
Citazione:
CMOS IC radiation hardening by design / A. Camplani, S. Shojaii, H. Shrimali, A. Stabile, V. Liberali. - In: FACTA UNIVERSITATIS. SERIES ELECTRONICS AND ENERGETICS. - ISSN 0353-3670. - 27:2(2014 Jun), pp. 251-258. [10.2298/FUEE1402251C]
Abstract:
Design techniques for radiation hardening of integrated circuits in commercial CMOS technologies are presented. Circuits designed with the proposed approaches are more tolerant to both total dose and to single event effects. The main drawback of the techniques for radiation hardening by design is the increase of silicon area, compared with a conventional design.
Tipologia IRIS:
01 - Articolo su periodico
Keywords:
radiation hardening; CMOS technology; integrated circuits
Elenco autori:
A. Camplani, S. Shojaii, H. Shrimali, A. Stabile, V. Liberali
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