Data di Pubblicazione:
2016
Citazione:
A prototype of a new generation readout ASIC in 65nm CMOS for pixel detectors at HL-LHC / E. Monteil, L. Pacher, A. Paternò, F. Loddo, N. Demaria, L. Gaioni, F. De Canio, G. Traversi, V. Re, L. Ratti, A. Rivetti, M. Da Rocha Rolo, G. Dellacasa, G. Mazza, C. Marzocca, F. Licciulli, F. Ciciriello, S. Marconi, P. Placidi, G. Magazzù, A. Stabile, S. Mattiazzo, C. Veri. - In: JOURNAL OF INSTRUMENTATION. - ISSN 1748-0221. - 11:12(2016 Dec 19). [10.1088/1748-0221/11/12/C12044]
Abstract:
This paper describes a readout ASIC prototype designed by CHIPIX65 project, part of RD53, for a pixel detector at HL-LHC. A 64 × 64 matrix of 50 × 50 μ m2 pixels is realised. A digital architecture has been developed, with particle efficiency above 99.9% at 3 GHz/cm2 pixel rate, 1 MHz trigger rate with 12.5 μ s latency. Two analog front end designs, one synchronous and one asynchronous, are implemented. Charge is measured with 5-bit precision and the analog dead-time is below 1%. IP-blocks (DAC, ADC, BandGap, SER, sLVS-TX/RX) and very front ends are silicon proven, irradiated to 600-800Mrad.
Tipologia IRIS:
01 - Articolo su periodico
Keywords:
Analogue electronic circuits; Digital electronic circuits; Front-end electronics for detector readout; Radiation-hard electronics; Instrumentation; Mathematical Physics
Elenco autori:
E. Monteil, L. Pacher, A. Paternò, F. Loddo, N. Demaria, L. Gaioni, F. De Canio, G. Traversi, V. Re, L. Ratti, A. Rivetti, M. Da Rocha Rolo, G. Dellacasa, G. Mazza, C. Marzocca, F. Licciulli, F. Ciciriello, S. Marconi, P. Placidi, G. Magazzù, A. Stabile, S. Mattiazzo, C. Veri
Link alla scheda completa: